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ROR (SPC700): Difference between revisions

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(typos in manual)
(→‎See Also: ror Super FX)
 
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Line 7: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|
|[[Accumulator Addressing | Accumulator]]
|7C
|7C
|1 byte
|1 byte
|2 cycles
|2 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|6B
|6B
|2 bytes
|2 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Direct Page Indexed by X]]
|7B
|7B
|2 bytes
|2 bytes
|5 cycles
|5 cycles
|+
|+
|
|[[Absolute Addressing | Absolute]]
|6C
|6C
|3 bytes
|3 bytes
Line 29: Line 29:


{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Flags Clobbered
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|P
|[[Direct Page Flag|P]]
|B
|[[Break Flag|B]]
|H
|[[Half-Carry Flag|H]]
|I
|[[Interrupt Enable Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|
|
Line 57: Line 57:
* [[ROL (SPC700)]]
* [[ROL (SPC700)]]
* [[ROR]]
* [[ROR]]
* [[ROR (Super FX)]]


=== External Links ===
=== External Links ===

Latest revision as of 19:42, 8 January 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 7C 1 byte 2 cycles
Direct Page 6B 2 bytes 4 cycles
Direct Page Indexed by X 7B 2 bytes 5 cycles
Absolute 6C 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
. . . . .

ROR is an SPC700 instruction that rotates its operand one bit to the right. The old value of the carry flag is rotated into the most significant bit. The least significant bit is rotated into the carry flag.

The official manual has the bit shift operators for ROR pointing the wrong way.

See Also

External Links