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SBC (SPC700): Difference between revisions

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{| class="wikitable" style="float:right;clear:right;width:40%"
{| class="wikitable" style="float:right;clear:right;width:45%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
Line 7: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|immediate
|[[Immediate]]
|A8
|A8
|2 bytes
|2 bytes
|2 cycles
|2 cycles
|+
|+
|
|[[Implied Indirect]] (type 1)
|A6
|A6
|1 byte
|1 byte
|3 cycles
|3 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|A4
|A4
|2 bytes
|2 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Direct Page Indexed by X]]
|B4
|B4
|2 bytes
|2 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Absolute Addressing | Absolute]]
|A5
|A5
|3 bytes
|3 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Absolute Indexed by X]]
|B5
|B5
|3 bytes
|3 bytes
|5 cycles
|5 cycles
|+
|+
|
|[[Absolute Indexed by Y]]
|B6
|B6
|3 bytes
|3 bytes
|5 cycles
|5 cycles
|+
|+
|
|[[Direct Page Indexed by X]]
|A7
|A7
|2 bytes
|2 bytes
|6 cycles
|6 cycles
|+
|+
|
|[[Direct Page Indirect Indexed by Y]]
|B7
|B7
|2 bytes
|2 bytes
|6 cycles
|6 cycles
|+
|+
|
|[[Implied Indirect]] (type 1)
|B9
|B9
|1 byte
|1 byte
|5 cycles
|5 cycles
|+
|+
|
|[[Direct Page]]
|A9
|A9
|3 bytes
|3 bytes
|6 cycles
|6 cycles
|+
|+
|
|[[Direct Page Immediate]]
|B8
|B8
|3 bytes
|3 bytes
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!colspan="8"|Flags Affected
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|P
|[[Direct Page Flag|P]]
|B
|[[Break Flag|B]]
|H
|[[Half-Carry Flag|H]]
|I
|[[Interrupt Enable Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|
|
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'''SBC''' (Subtract) is an [[SPC700]] instruction that subtracts the right operand and the inverse of the [[carry flag]] from the left operand.  Often, the left operand is the [[accumulator]].
'''SBC''' (Subtract) is an [[SPC700]] instruction that subtracts the right operand and the inverse of the [[carry flag]] from the left operand.  Often, the left operand is the [[accumulator]].
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.


=== See Also ===
=== See Also ===
* [[ADC (SPC700)]]
* [[ADC (SPC700)]]
* [[SBC]]
* [[SBC]]
* [[SUBW]]


=== External Links ===
=== External Links ===
* Official Super Nintendo development manual on SBC: [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I]
* Official Super Nintendo development manual on SBC: Table C-7 in [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I]


[[Category:ASM]]
[[Category:ASM]]
[[Category:SPC700]]
[[Category:SPC700]]
[[Category:8-bit Arithmetic Operation Commands]]
[[Category:8-bit Arithmetic Operation Commands]]

Latest revision as of 04:53, 27 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate A8 2 bytes 2 cycles
Implied Indirect (type 1) A6 1 byte 3 cycles
Direct Page A4 2 bytes 3 cycles
Direct Page Indexed by X B4 2 bytes 4 cycles
Absolute A5 3 bytes 4 cycles
Absolute Indexed by X B5 3 bytes 5 cycles
Absolute Indexed by Y B6 3 bytes 5 cycles
Direct Page Indexed by X A7 2 bytes 6 cycles
Direct Page Indirect Indexed by Y B7 2 bytes 6 cycles
Implied Indirect (type 1) B9 1 byte 5 cycles
Direct Page A9 3 bytes 6 cycles
Direct Page Immediate B8 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
. . .

SBC (Subtract) is an SPC700 instruction that subtracts the right operand and the inverse of the carry flag from the left operand. Often, the left operand is the accumulator.

The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.

See Also

External Links