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SEP: Difference between revisions

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{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="9"|Flags Clobbered
|+
|+
|'''Addressing Mode'''
|N
|'''Opcode'''
|V
|'''Length'''
|M
|'''Speed'''
|X
|D
|I
|Z
|C
|+
|+
|implied
|
|78
|
|1 byte
|
|2 cycles
|
|
|
|
|
|}
|}



Revision as of 06:39, 4 May 2023

SEP is a 65c816 instruction that sets bits in the status register that correspond to set bits in the operand.

Basic Info
Addressing Mode Opcode Length Speed
immediate E2 2 bytes 3 cycles
Flags Clobbered
N V M X D I Z C

See Also