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TRB: Difference between revisions
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{| class="wikitable" style="float:right;clear:right;width: | {| class="wikitable" style="float:right;clear:right;width:40%" | ||
!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
| Line 7: | Line 7: | ||
|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Absolute Addressing | Absolute]] | ||
|1C | |1C | ||
|3 bytes | |3 bytes | ||
|6 cycles | |6 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Addressing | Direct Page]] | ||
|14 | |14 | ||
|2 bytes | |2 bytes | ||
|5 cycles | |5 cycles* | ||
|} | |} | ||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="8"|Flags | !colspan="8"|Flags Affected | ||
|+ | |+ | ||
|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|M | |[[M Flag|M]] | ||
|X | |[[X Flag|X]] | ||
|D | |[[Decimal Flag|D]] | ||
|I | |[[I Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
|+ | |+ | ||
|. | |. | ||
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|} | |} | ||
'''TRB''' (Test and Reset Bits) is a [[65c816]] instruction that tests and resets bits. | '''TRB''' (Test and Reset Bits) is a [[65c816]] instruction that tests and resets bits using the [[accumulator]]. For each set bit in the accumulator, the corresponding memory bit is cleared. | ||
TRB performs a logical AND (conjunction) and the [[zero flag]] is set or cleared to reflect whether the conjunction is zero. | |||
===== Cycle Penalties ===== | |||
* In both [[addressing modes]], TRB takes two extra cycles if the accumulator is 16 bits wide. | |||
* In [[direct page addressing]], TRB takes another extra cycle if the low byte of the [[direct page register]] is nonzero. | |||
=== See Also === | === See Also === | ||
* [[TSB]] | * [[TSB]] | ||
* [[TCLR1]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] page on TRB: https://archive.org/details/0893037893ProgrammingThe65816/page/n539 | * [[Eyes & Lichty]] page 513, on TRB: https://archive.org/details/0893037893ProgrammingThe65816/page/n539 | ||
* [[Labiak]] page on TRB: https://archive.org/details/Programming_the_65816/page/n204 | * [[Labiak]] page 194 on TRB: https://archive.org/details/Programming_the_65816/page/n204 | ||
* snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338 | * snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338 | ||
* undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator | * undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator | ||
Latest revision as of 07:30, 10 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 1C | 3 bytes | 6 cycles* | ||||
| Direct Page | 14 | 2 bytes | 5 cycles* | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | . | |
TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits using the accumulator. For each set bit in the accumulator, the corresponding memory bit is cleared.
TRB performs a logical AND (conjunction) and the zero flag is set or cleared to reflect whether the conjunction is zero.
Cycle Penalties
- In both addressing modes, TRB takes two extra cycles if the accumulator is 16 bits wide.
- In direct page addressing, TRB takes another extra cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty page 513, on TRB: https://archive.org/details/0893037893ProgrammingThe65816/page/n539
- Labiak page 194 on TRB: https://archive.org/details/Programming_the_65816/page/n204
- snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338
- undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator