TRB
From SnesLab
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 1C | 3 bytes | 6 cycles* | ||||
| Direct Page | 14 | 2 bytes | 5 cycles* | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | Z | . |
TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits using the accumulator. For each set bit in the accumulator, TRB clears the corresponding memory bit. All other memory bits are unchanged.
Also, TRB performs a logical AND (conjunction) between the accumulator and memory values, setting or clearing the zero flag to reflect whether the conjunction is zero. The conjunction itself is discarded.
The size of the accumulator determines whether this is an 8 or 16 bit operation. If 16-bit, the low-order byte is located at the effective address and the high-order byte at the effective address plus one.
Syntax
TRB addr TRB dp
Cycle Penalties
- In both addressing modes, TRB takes two extra cycles if the accumulator is 16 bits wide.
- In direct page addressing, TRB takes another extra cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty, page 513 on TRB
- Labiak, page 194 on TRB
- snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338
- undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator]