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TRB: Difference between revisions

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(made basic info table shorter)
(→‎See Also: TCLR1)
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=== See Also ===
=== See Also ===
* [[TSB]]
* [[TSB]]
* [[TCLR1]]


=== External Links ===
=== External Links ===

Revision as of 19:30, 23 July 2023

Basic Info
Addressing Mode Opcode Length Speed
absolute 1C 3 bytes 6 cycles
direct page 14 2 bytes 5 cycles
Flags Clobbered
N V M X D I Z C
. . . . . . .

TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits.

See Also

External Links