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TSB: Difference between revisions

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'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the accumulator.  For each set bit of the accumulator, the corresponding memory bit is also set. TSB takes two additional cycles if the accumulator is 16 bits wide. In [[direct page addressing]], TSB takes another additional cycle if the low byte of the [[direct page register]] is nonzero.  
'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the accumulator.  For each set bit of the accumulator, the corresponding memory bit is also set.
 
===== Cycle Penalties =====
* TSB takes two extra cycles if the accumulator is 16 bits wide.
* In [[direct page addressing]], TSB takes another extra cycle if the low byte of the [[direct page register]] is nonzero.  


=== See Also ===
=== See Also ===

Revision as of 08:32, 8 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Absolute 0C 3 bytes 6 cycles*
Direct Page 04 2 bytes 5 cycles*
Flags Affected
N V M X D I Z C
. . . . . . .

TSB (Test and Set Bits) is a 65c816 instruction that tests and sets bits using the accumulator. For each set bit of the accumulator, the corresponding memory bit is also set.

Cycle Penalties

See Also

External Links