We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
VRAM Bus Control: Difference between revisions
From SnesLab
(created page) |
(→External Links: bullet point to numbering) |
||
| Line 2: | Line 2: | ||
=== External Links === | === External Links === | ||
# https://archive.org/details/SNESDevManual/book1/page/n97 | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Buses]] | [[Category:Buses]] | ||
Revision as of 07:32, 13 July 2023
VRAM Bus Control, so-called in Figure 2-22-1 "Super NES Functional Block Diagram" on page 2-22-2 of the official documentation [1], is the VRAM address bus.