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MAD-R
From SnesLab
The Memory Address Decoder with Reset-Inverter is similar to MAD-1, except that pin 4 outputs RESET.
Logic Table
IN0 Address 0 | IN1 Address 1 | IN2 Address 2 | IN3 Address 3 | IN4 /ROM | IN5 MODE | IN6 /RES |
---|---|---|---|---|---|---|
x | x | x | x | x | x | high |
x | x | low | low | low | low | high |
x | x | high | low | low | low | high |
x | x | low | high | low | low | high |
low | high | high | high | low | low | high |
x | x | low | x | low | high | high |
x | x | high | x | low | high | high |
high | high | low | low | high | high | high |
high | high | high | low | high | high | high |