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Processor Status Register: Difference between revisions

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(→‎Reference: figure 17.3)
(nine that modify flags)
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It can be pulled from the [[stack]] via [[PLP]] and [[RTI]].
It can be pulled from the [[stack]] via [[PLP]] and [[RTI]].
There are nine instructions that modify these flags.<sup>[3]</sup>


=== See Also ===
=== See Also ===
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=== Reference ===
=== Reference ===
* Table 18.2 [[Eyes & Lichty]], page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/n448
# Table 18.2 [[Eyes & Lichty]], page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/n448
* Figure 17.3, Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/n403
# Figure 17.3, Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/n403
# https://archive.org/details/0893037893ProgrammingThe65816/page/n288


[[Category:Registers]]
[[Category:Registers]]
[[Category:Flags]]
[[Category:Flags]]

Revision as of 08:58, 15 December 2023

The Processor Status Register (P) is on the 65c816 and contains several flags:

  • n
  • v
  • m
  • x
  • d
  • i
  • z
  • c

It can be pulled from the stack via PLP and RTI.

There are nine instructions that modify these flags.[3]

See Also

Reference

  1. Table 18.2 Eyes & Lichty, page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/n448
  2. Figure 17.3, Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/n403
  3. https://archive.org/details/0893037893ProgrammingThe65816/page/n288