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OR1 (SPC700): Difference between revisions
From SnesLab
(→External Links: page 3-8-8) |
(→See Also: NOT1) |
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* [[EOR1]] | * [[EOR1]] | ||
* [[MOV1]] | * [[MOV1]] | ||
* [[NOT1]] | |||
=== External Links === | === External Links === | ||
Revision as of 06:09, 18 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 13-bit Absolute | 0A | 3 bytes | 5 cycles | ||||
| 13-bit Absolute | 2A | 3 bytes | 5 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |
OR1 is an SPC700 instruction that performs a logical or between a memory bit and the carry flag, then stores the disjunction in the carry flag. The low 13 bits of the operand byte specify an absolute address. The high 3 bits of the operand byte specify which bit at that absolute address.
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.
See Also
External Links
- Official Super Nintendo development manual on OR1: Appendix C-9 of Book I
- page 3-8-8, lbid.