NOT1 (SPC700): Difference between revisions

Latest revision as of 21:25, 13 July 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Absolute Boolean Bit	EA	3 bytes	5 cycles


Flags Affected
N	V	P	B	H	I	Z	C
.	.	.	.	.	.	.	.

NOT1 is an SPC700 instruction that flips a bit. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address. The bit flipped can live at any ARAM address from 0000h to 1fffh.

No flags are affected.

Syntax

NOT1 mem. bit

External Links

Official Nintendo documentation on NOT1: Table C-18 in Appendix C-9 of Book I
subparagraph 8.2.3.3 of page 3-8-8, lbid.
anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L514

@@ Line 7: / Line 7: @@
 |'''Speed'''
 |+
-|[[13-bit Absolute]]
+|[[Absolute Boolean Bit]]
 |EA
-|3 byte
+|3 bytes
 |5 cycles
 |}
@@ Line 35: / Line 35: @@
 |}
-'''NOT1''' is an [[SPC700]] instruction that performs a complement of a bit.  The low 13 bits of the operand specify an absolute address.  The high 3 bits of the operand specify which bit at that absolute address.
+'''NOT1''' is an [[SPC700]] instruction that flips a bit.  The low 13 bits of the operand specify an absolute address.  The high 3 bits of the operand specify which bit at that absolute address.  The bit flipped can live at any [[ARAM]] address from 0000h to 1fffh.
+No flags are affected.
+==== Syntax ====
+<pre>
+NOT1 mem. bit
+</pre>
 === See Also ===
@@ Line 42: / Line 49: @@
 * [[AND1]]
 * [[EOR1]]
+* [[MOV1]]
 === External Links ===
 * Official Nintendo documentation on NOT1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
-* [https://archive.org/details/SNESDevManual/book1/page/n186 page 3-8-8]
+* subparagraph 8.2.3.3 of [https://archive.org/details/SNESDevManual/book1/page/n186 page 3-8-8], lbid.
+* anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L514
 [[Category:ASM]]