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IBT: Difference between revisions

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where pp may be from -128 to 127.  Any of the 16 general registers can be specified.
where pp may be from -128 to 127.  Any of the 16 general registers can be specified.
==== Example ====
IBT R<sub>8</sub>, #4    ; 0004h -> R<sub>8</sub>
IBT R<sub>8</sub>, #-128 ; ff80h -> R<sub>8</sub>
IBT R<sub>8</sub>, #0A4h ; ffa4h -> R<sub>8</sub>


==== Trivia ====
==== Trivia ====

Revision as of 02:01, 16 July 2024

Basic Info
Addressing Mode Opcode Length ROM Speed RAM Speed Cache Speed
Immediate Anpp 2 bytes 6 cycles 6 cycles 2 cycles
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 . . . .

IBT (Immediate Byte Transfer) is a Super FX instruction that loads an immediate byte into the low byte of a specified general register. The register's upper eight bits will be sign-extended (copied) from bit 7, effectively loading a signed 8-bit value.

The ALT0 state is restored.

Syntax

IBT Rn, #pp

where pp may be from -128 to 127. Any of the 16 general registers can be specified.

Example

IBT R8, #4    ; 0004h -> R8
IBT R8, #-128 ; ff80h -> R8
IBT R8, #0A4h ; ffa4h -> R8

Trivia

The word "integer" is misspelled in the official manual page for IBT.

See Also

External Links