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TSB: Difference between revisions
From SnesLab
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=== See Also === | === See Also === | ||
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Revision as of 04:15, 16 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 0C | 3 bytes | 6 cycles* | ||||
| Direct Page | 04 | 2 bytes | 5 cycles* | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | . | |
TSB (Test and Set Bits) is a 65c816 instruction that tests and sets bits using the accumulator. For each set bit of the accumulator, the corresponding memory bit is also set.
TSB performs a logical AND (conjunction) and the zero flag is set or cleared to reflect whether the conjunction is zero.
Syntax
TSB addr TSB dp
Cycle Penalties
- TSB takes two extra cycles if the accumulator is 16 bits wide.
- In direct page addressing, TSB takes another extra cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty page 514, on TSB: https://archive.org/details/0893037893ProgrammingThe65816/page/514
- Labiak page 195 on TSB: https://archive.org/details/Programming_the_65816/page/n205
- snes9x implementation of TSB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1348
- undisbeliever on TSB: https://undisbeliever.net/snesdev/65816-opcodes.html#tsb-test-and-set-memory-bits-against-accumulator