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CMP (SPC700): Difference between revisions

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(see also CMPW)
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'''CMP''' is an [[SPC700]] instruction that compares.
{| class="wikitable" style="float:right;clear:right;width:45%"
 
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
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|'''Speed'''
|'''Speed'''
|+
|+
|immediate
|[[Immediate Addressing | Immediate]]
|68
|68
|2 bytes
|2 bytes
|2 cycles
|2 cycles
|+
|+
|
|[[Implied Indirect]] (type 1)
|66
|66
|1 bytes
|1 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|64
|64
|2 bytes
|2 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Direct Page Indexed by X]]
|74
|74
|2 bytes
|2 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Absolute Addressing | Absolute]]
|65
|65
|3 bytes
|3 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Absolute Indexed by X]]
|75
|75
|3 bytes
|3 bytes
|5 cycles
|5 cycles
|+
|+
|
|[[Absolute Indexed by Y]]
|76
|76
|3 bytes
|3 bytes
|5 cycles
|5 cycles
|+
|+
|
|[[Direct Page Indexed Indirect by X]]
|67
|67
|2 byte
|2 byte
|6 cycles
|6 cycles
|+
|+
|
|[[Direct Page Indirect Indexed by Y]]
|77
|77
|2 bytes
|2 bytes
|6 cycles
|6 cycles
|+
|+
|
|[[Implied Indirect]] (type 1)
|79
|79
|1 bytes
|1 bytes
|5 cycles
|5 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|69
|69
|3 bytes
|3 bytes
|6 cycles
|6 cycles
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|
|[[Direct Page Immediate]]
|78
|78
|3 bytes
|3 bytes
|5 cycles
|5 cycles
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|+
|
|[[Immediate Addressing | Immediate]]
|C8
|C8
|2 bytes
|2 bytes
|2 cycles
|2 cycles
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|+
|
|[[Direct Page Addressing | Direct Page]]
|3E
|3E
|2 bytes
|2 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Absolute Addressing | Absolute]]
|1E
|1E
|3 bytes
|3 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Immediate Addressing | Immediate]]
|AD
|AD
|2 bytes
|2 bytes
|2 cycles
|2 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|7E
|7E
|2 bytes
|2 bytes
|3 cycles
|3 cycles
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|+
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|[[Absolute Addressing | Absolute]]
|5E
|5E
|3 bytes
|3 bytes
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!colspan="8"|Flags Affected
!colspan="8"|Flags Affected
|+
|[[Negative Flag|N]]
|[[Overflow Flag|V]]
|[[Direct Page Flag|P]]
|[[Break Flag|B]]
|[[Half-Carry Flag|H]]
|[[Interrupt Enable Flag|I]]
|[[Zero Flag|Z]]
|[[Carry Flag|C]]
|+
|+
|N
|N
|V
|P
|B
|H
|I
|Z
|C
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'''CMP''' is an [[SPC700]] instruction that compares two operands.  The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified.
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.
==== Syntax ====
<pre>
CMP A, #imm
CMP A, (X)
CMP A, dp
CMP A, dp+X
CMP A, !abs
CMP A, !abs+X
CMP A, !abs+Y
CMP A, [dp+X]
CMP A, [dp]+Y
CMP (X), (Y)
CMP dp<d>, dp<s>
CMP dp, #imm
CMP X, dp
CMP X, !abs
CMP Y, #imm
CMP Y, dp
CMP Y, !abs
</pre>


=== See Also ===
=== See Also ===
* [[CMPW]]
* [[CMPW]]
* [[CMP]]
* [[CMP (Super FX)]]


=== External Links ===
=== External Links ===
* Official Super Nintendo development manual on CMP: [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I]
* Official Super Nintendo development manual on CMP: Table C-7 in [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I]
* anomie: https://github.com/yupferris/TasmShiz/blob/8fabc9764c33a7ae2520a76d80ed7220bb939f12/spc700.txt#L388


[[Category:ASM]]
[[Category:ASM]]
[[Category:SPC700]]
[[Category:SPC700]]
[[Category:8-bit Arithmetic Operation Commands]]

Latest revision as of 13:54, 30 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Immediate 68 2 bytes 2 cycles
Implied Indirect (type 1) 66 1 bytes 3 cycles
Direct Page 64 2 bytes 3 cycles
Direct Page Indexed by X 74 2 bytes 4 cycles
Absolute 65 3 bytes 4 cycles
Absolute Indexed by X 75 3 bytes 5 cycles
Absolute Indexed by Y 76 3 bytes 5 cycles
Direct Page Indexed Indirect by X 67 2 byte 6 cycles
Direct Page Indirect Indexed by Y 77 2 bytes 6 cycles
Implied Indirect (type 1) 79 1 bytes 5 cycles
Direct Page 69 3 bytes 6 cycles
Direct Page Immediate 78 3 bytes 5 cycles
Immediate C8 2 bytes 2 cycles
Direct Page 3E 2 bytes 3 cycles
Absolute 1E 3 bytes 4 cycles
Immediate AD 2 bytes 2 cycles
Direct Page 7E 2 bytes 3 cycles
Absolute 5E 3 bytes 4 cycles
Flags Affected
N V P B H I Z C
N . . . . . Z C

CMP is an SPC700 instruction that compares two operands. The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified.

The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.

Syntax

CMP A, #imm
CMP A, (X)
CMP A, dp
CMP A, dp+X
CMP A, !abs
CMP A, !abs+X
CMP A, !abs+Y
CMP A, [dp+X]
CMP A, [dp]+Y
CMP (X), (Y)
CMP dp<d>, dp<s>
CMP dp, #imm
CMP X, dp
CMP X, !abs
CMP Y, #imm
CMP Y, dp
CMP Y, !abs

See Also

External Links

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