We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

EOR1 (SPC700): Difference between revisions

From SnesLab
Jump to: navigation, search
(→‎External Links: applicable memory location)
(made flags affected more prominent)
 
(7 intermediate revisions by the same user not shown)
Line 7: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|[[13-bit Absolute]]
|[[Absolute Boolean Bit]]
|8A
|8A
|3 bytes
|3 bytes
Line 32: Line 32:
|.
|.
|.
|.
|
|C
|}
|}


'''EOR1''' is an [[SPC700]] instruction that performs an exclusive or between a memory bit and the [[carry flag]] and stores the sum in the carry flag.  The low 13 bits of the operand specify an absolute address.  The high 3 bits of the operand specify which bit at that absolute address.
'''EOR1''' is an [[SPC700]] instruction that performs an exclusive or between a memory bit and the [[carry flag]] and stores the sum in the carry flag.  The low 13 bits of the operand specify an absolute address.  The high 3 bits of the operand specify which bit at that absolute address.
==== Syntax ====
<pre>
EOR1 C, mem. bit
</pre>


=== See Also ===
=== See Also ===
* [[AND1]]
* [[AND1]]
* [[OR1]]
* [[OR1]]
* [[NOT1]]
* [[MOV1]]
* [[EOR]]
* [[EOR]]


=== External Links ===
=== External Links ===
* Official Super Nintendo development manual on EOR1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
* Official Super Nintendo development manual on EOR1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
* https://archive.org/details/SNESDevManual/book1/page/n186
* subparagraph 8.2.3.3 of [https://archive.org/details/SNESDevManual/book1/page/n186 page 3-8-8], lbid.
* anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L443


[[Category:ASM]]
[[Category:ASM]]

Latest revision as of 14:00, 30 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Absolute Boolean Bit 8A 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
. . . . . . . C

EOR1 is an SPC700 instruction that performs an exclusive or between a memory bit and the carry flag and stores the sum in the carry flag. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.

Syntax

EOR1 C, mem. bit

See Also

External Links