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Direct Page Bit Addressing: Difference between revisions
From SnesLab
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(two bytes long) |
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* [[SET1]] | * [[SET1]] | ||
* [[CLR1]] | * [[CLR1]] | ||
Both of which are two bytes long. | |||
==== Syntax ==== | ==== Syntax ==== | ||
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=== See Also === | === See Also === | ||
* [[dip bit]] | * [[dip bit]] | ||
* [[Absolute Boolean Bit Addressing]] | |||
* [[Direct Page Bit Relative Addressing]] | |||
* [[Direct Page Addressing]] | |||
=== Reference === | |||
* Figure 3-8-3 Memory Access Addressing Effective Address on [https://archive.org/details/SNESDevManual/book1/page/n187 page 3-8-9 of Book I] of the official Super Nintendo development manual | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Addressing Modes]] | [[Category:Addressing Modes]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
Latest revision as of 14:22, 1 August 2024
Direct Page Bit Addressing is supported by the SPC700 by the following instructions:
Both of which are two bytes long.
Syntax
CLR1 dip. bit SET1 dip. bit
See Also
Reference
- Figure 3-8-3 Memory Access Addressing Effective Address on page 3-8-9 of Book I of the official Super Nintendo development manual