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PLB: Difference between revisions

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(dubious tag)
(works in 6502 emulation mode)
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PLB
PLB
</pre>
</pre>
PLB works even in [[emulation mode]] even though all bank addresses are forced to zero.<sup>[5]</sup>


=== See Also ===
=== See Also ===
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# snes9x implementation of PLB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2032
# snes9x implementation of PLB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2032
# Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3
# Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3
# section 7.8.2 of 65c816 datasheet


[[Category:ASM]]
[[Category:ASM]]

Revision as of 21:19, 3 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) AB 1 byte 4 cycles
Flags Affected
N V M X D I Z C
N . . . . . Z .

PLB (PulL data Bank) is a 65c816 instruction that pulls the byte at the top of the stack into the data bank register. PLB is the only instruction that modifies that register.[1][dubious, see MVP and MVN] The stack pointer is incremented before the byte it points to is pulled into the register.

Syntax

PLB

PLB works even in emulation mode even though all bank addresses are forced to zero.[5]

See Also

External Links

  1. Eyes & Lichty page 484, on PLB: https://archive.org/details/0893037893ProgrammingThe65816/page/484
  2. Labiak page 168 on PLB: https://archive.org/details/Programming_the_65816/page/n178
  3. snes9x implementation of PLB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2032
  4. Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3
  5. section 7.8.2 of 65c816 datasheet