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Carry Flag: Difference between revisions
From SnesLab
(more description of side effects) |
(more side effect description) |
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* [[ADC]] | * [[ADC]] | ||
* [[ASL]] | * [[ASL]] (becomes whatever the most significant bit was) | ||
* [[CMP]] | * [[CMP]] | ||
* [[CPX]] | * [[CPX]] | ||
| Line 14: | Line 14: | ||
* [[ROR]] (becomes whatever bit 0 was) | * [[ROR]] (becomes whatever bit 0 was) | ||
* [[SBC]] | * [[SBC]] | ||
* [[XCE]] | * [[XCE]] (becomes whatever the e flag was) | ||
The following two instructions indirectly affect the carry flag by loading the [[status register]]: | The following two instructions indirectly affect the carry flag by loading the [[status register]]: | ||
Revision as of 22:40, 4 August 2024
The Carry Flag (C) exists on the 65c816 as bit 0 of the status register.
It can be set with SEC and cleared with CLC. Or, SEP and REP can be used.
The following other 10 instructions have side effects that directly affect the carry flag:
- ADC
- ASL (becomes whatever the most significant bit was)
- CMP
- CPX
- CPY
- LSR (becomes whatever bit 0 was)
- ROL (becomes whatever the most significant bit was)
- ROR (becomes whatever bit 0 was)
- SBC
- XCE (becomes whatever the e flag was)
The following two instructions indirectly affect the carry flag by loading the status register:
The carry flag influences whether BCS and BCC branch or not.
See Also
Reference
- Labiak, William. Page 108. https://archive.org/details/Programming_the_65816/page/n118