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'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the [[accumulator]].  For each set bit of the accumulator, the corresponding memory bit is also set.
'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the [[accumulator]].  For each set bit of the accumulator, TSB sets the corresponding memory bit.


TSB performs a logical AND (conjunction) and the [[zero flag]] is set or cleared to reflect whether the conjunction is zero.
TSB performs a logical AND (conjunction) and the [[zero flag]] is set or cleared to reflect whether the conjunction is zero.  The conjunction itself is discarded.


==== Syntax ====
==== Syntax ====
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===== Cycle Penalties =====
==== Cycle Penalties ====
* TSB takes two extra cycles if the accumulator is 16 bits wide.
* TSB takes two extra cycles if the accumulator is 16 bits wide.
* In [[direct page addressing]], TSB takes another extra cycle if the low byte of the [[direct page register]] is nonzero.  
* In [[direct page addressing]], TSB takes another extra cycle if the low byte of the [[direct page register]] is nonzero.  

Latest revision as of 17:50, 23 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Absolute 0C 3 bytes 6 cycles*
Direct Page 04 2 bytes 5 cycles*
Flags Affected
N V M X D I Z C
. . . . . . Z .

TSB (Test and Set Bits) is a 65c816 instruction that tests and sets bits using the accumulator. For each set bit of the accumulator, TSB sets the corresponding memory bit.

TSB performs a logical AND (conjunction) and the zero flag is set or cleared to reflect whether the conjunction is zero. The conjunction itself is discarded.

Syntax

TSB addr
TSB dp

Cycle Penalties

See Also

External Links