TSB: Difference between revisions

Latest revision as of 17:50, 23 August 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Absolute	0C	3 bytes	6 cycles*
Direct Page	04	2 bytes	5 cycles*


Flags Affected
N	V	M	X	D	I	Z	C
.	.	.	.	.	.	Z	.

TSB (Test and Set Bits) is a 65c816 instruction that tests and sets bits using the accumulator. For each set bit of the accumulator, TSB sets the corresponding memory bit.

TSB performs a logical AND (conjunction) and the zero flag is set or cleared to reflect whether the conjunction is zero. The conjunction itself is discarded.

Syntax

TSB addr
TSB dp

Cycle Penalties

TSB takes two extra cycles if the accumulator is 16 bits wide.
In direct page addressing, TSB takes another extra cycle if the low byte of the direct page register is nonzero.

External Links

Eyes & Lichty, page 514 on TSB
Labiak, page 195 on TSB
snes9x implementation of TSB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1348
undisbeliever on TSB: https://undisbeliever.net/snesdev/65816-opcodes.html#tsb-test-and-set-memory-bits-against-accumulator]

@@ Line 1: / Line 1: @@
-'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits.
+{| class="wikitable" style="float:right;clear:right;width:40%"
-{| class="wikitable" style="float:right;clear:right;width:30%"
 !colspan="8"|Basic Info
 |+
@@ Line 9: / Line 7: @@
 |'''Speed'''
 |+
-|absolute
+|[[Absolute Addressing | Absolute]]
 |0C
 |3 bytes
-|6 cycles
+|6 cycles*
 |+
-|direct page
+|[[Direct Page Addressing | Direct Page]]
 |04
 |2 bytes
-|5 cycles
+|5 cycles*
 |}
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="8"|Flags Clobbered
+!colspan="8"|Flags Affected
 |+
-|N
+|[[Negative Flag|N]]
-|V
+|[[Overflow Flag|V]]
-|M
+|[[M Flag|M]]
-|X
+|[[X Flag|X]]
-|D
+|[[Decimal Flag|D]]
-|I
+|[[I Flag|I]]
-|Z
+|[[Zero Flag|Z]]
-|C
+|[[Carry Flag|C]]
 |+
 |.
@@ Line 38: / Line 36: @@
 |.
 |.
-|
+|Z
 |.
 |}
+'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the [[accumulator]].  For each set bit of the accumulator, TSB sets the corresponding memory bit.
+TSB performs a logical AND (conjunction) and the [[zero flag]] is set or cleared to reflect whether the conjunction is zero.  The conjunction itself is discarded.
+==== Syntax ====
+<pre>
+TSB addr
+TSB dp
+</pre>
+==== Cycle Penalties ====
+* TSB takes two extra cycles if the accumulator is 16 bits wide.
+* In [[direct page addressing]], TSB takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
 === See Also ===
 * [[TRB]]
+* [[BIT]]
+* [[SEP]]
+* [[TSET1]]
+=== External Links ===
+* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/514 page 514] on TSB
+* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n205 page 195] on TSB
+* snes9x implementation of TSB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1348
+* undisbeliever on TSB: https://undisbeliever.net/snesdev/65816-opcodes.html#tsb-test-and-set-memory-bits-against-accumulator
 [[Category:ASM]]
 [[Category:Read-Modify-Write Instructions]]
+[[Category:Test-and-Change-Bits Instructions]]]
 [[Category:65c02 additions]]