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Write-Twice Register: Difference between revisions
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This is accomplished via an additional, hidden 8-bit buffer. | This is accomplished via an additional, hidden 8-bit buffer. | ||
* On the first write, the 8-bit value from the CPU | * On the first write, the 8-bit value from the [[CPU Data Bus]] is written to the hidden buffer, but the contents of the 16-bit register are not updated yet. | ||
* On the second write, both the new 8-bit value from the CPU's data bus and the buffered 8-bit value both overwrite the old contents of the 16-bit register simultaneously. | * On the second write, both the new 8-bit value from the CPU's data bus and the buffered 8-bit value both overwrite the old contents of the 16-bit register simultaneously. | ||
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[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Registers]] | |||
[[Category:Buffers]] | |||
Latest revision as of 01:07, 17 July 2023
A write-twice register is a 16-bit register that is mapped to only 8-bits in an address space. The motivation behind write-twice registers is that they prevent glitches caused by software accidentally only updating half of a 16-bit register. This is accomplished via an additional, hidden 8-bit buffer.
- On the first write, the 8-bit value from the CPU Data Bus is written to the hidden buffer, but the contents of the 16-bit register are not updated yet.
- On the second write, both the new 8-bit value from the CPU's data bus and the buffered 8-bit value both overwrite the old contents of the 16-bit register simultaneously.