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(added asterisks to number of cycles)
(→‎Cycle Penalties: no cycle penalty for decimal mode)
 
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|[[Immediate]]
|[[Immediate]]
|69
|69
|2 bytes
|2/3 bytes
|2 cycles*
|2 cycles*
|+
|+
|absolute
|[[Absolute]]
|6D
|6D
|3 bytes
|3 bytes
|4 cycles*
|4 cycles*
|+
|+
|absolute long
|[[Absolute Long Addressing|Absolute Long]]
|6F
|6F
|4 bytes
|4 bytes
|5 cycles*
|5 cycles*
|+
|+
|direct page
|[[Direct Page Addressing|Direct Page]]
|65
|65
|2 bytes
|2 bytes
|3 cycles*
|3 cycles*
|+
|+
|direct page indirect
|[[Direct Page Indirect]]
|72
|72
|2 bytes
|2 bytes
|5 cycles*
|5 cycles*
|+
|+
|direct page indirect long
|[[Direct Page Indirect Long]]
|67
|67
|2 bytes
|2 bytes
|6 cycles*
|6 cycles*
|+
|+
|absolute indexed by X
|[[Absolute Indexed by X]]
|7D
|7D
|3 bytes
|3 bytes
|4 cycles*
|4 cycles*
|+
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|absolute long indexed by X
|[[Absolute Long Indexed by X]]
|7F
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|5 cycles*
|5 cycles*
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|absolute indexed by Y
|[[Absolute Indexed by Y]]
|79
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|4 cycles*
|+
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|direct page indexed by X
|[[Direct Page Indexed by X]]
|75
|75
|2 bytes
|2 bytes
|4 cycles*
|4 cycles*
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|direct page indexed indirect by X
|[[Direct Page Indexed Indirect by X]]
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|6 cycles*
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|direct page indirect indexed by Y
|[[Direct Page Indirect Indexed by Y]]
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|2 bytes
|5 cycles*
|5 cycles*
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|direct page indirect long indexed by Y
|[[Direct Page Indirect Long Indexed by Y]]
|77
|77
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|2 bytes
|6 cycles*
|6 cycles*
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|stack relative
|[[Stack Relative]]
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|63
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|4 cycles*
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|[[Stack Relative Indirect Indexed by Y]]
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{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="9"|Flags Affected
!colspan="9"|Flags Affected
|+
|[[N Flag|N]]
|[[V Flag|V]]
|[[M Flag|M]]
|[[X Flag|X]]
|[[D Flag|D]]
|[[I Flag|I]]
|[[Z Flag|Z]]
|[[C Flag|C]]
|+
|+
|N
|N
|V
|V
|M
|X
|D
|I
|Z
|C
|+
|
|
|.
|.
|.
|.
|.
|.
|.
|.
|
|Z
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|C
|}
|}


'''ADC''' (Add with Carry) is 65x instruction that performs an addition.  As there is no add-without-carry instruction, a [[CLC]] should be run (or the carry flag otherwise ensured to be clear) before an ADC, or else the sum will be one greater than expected.
'''ADC''' (Add with Carry) is the main 65x addition instruction.  The accumulator is always both one of the addends and where the sum is stored.  The operand serves as the other addend.
 
As there is no add-without-carry instruction, a [[CLC]] should be run (or the carry flag otherwise ensured to be clear) before an ADC, or else the sum will be one greater than expected.
 
After ADC runs, the [[carry flag]] will indicate whether the addition caused an unsigned overflow (sum greater than $FF or $FFFF depending on how wide the accumulator is).  The [[zero flag]] will be set if the sum is zero and cleared otherwise.
 
If the [[decimal flag]] is set, then [[binary coded decimal]] addition is performed (with the sum being adjusted automatically), otherwise binary addition.
 
==== Syntax ====
 
<pre>
ADC #const
ADC addr
ADC long
ADC dp
ADC (dp)
ADC [dp]
ADC addr, X
ADC long, X
ADC addr, Y
ADC dp, X
ADC (dp, X)
ADC (dp), Y
ADC [dp], Y
ADC sr, S
ADC (sr, S), Y
</pre>
 
==== Cycle Penalties ====
ADC takes an extra cycle for each of the following:
* if the accumulator is 16 bits wide, in all addressing modes
* when utilizing the [[direct register]], if the low byte of the direct register is nonzero
* in certain addressing modes if adding an index crosses a [[page]] boundary
 
If you only need to add one, consider [[INC]] instead.  Unlike the 65c02, the 65c816 does not have a cycle penalty when adding in decimal mode.


=== See Also ===
=== See Also ===
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* [[ADC (SPC700)]]
* [[ADC (SPC700)]]
* [[ADC (Super FX)]]
* [[ADC (Super FX)]]
* [[ADD (Super FX)]]
* [[INX]]
* [[INY]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on ADC: https://archive.org/details/0893037893ProgrammingThe65816/page/n449
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/423 page 423] on ADC
* [[Labiak]] page on ADC: https://archive.org/details/Programming_the_65816/page/n125
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n125 page 115] on ADC
* [[MCS6500 Manual]] page on ADC: https://archive.org/details/mos_microcomputers_programming_manual/page/n22
* 2.2.1 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n22 page 7] on ADC
* [[Carr]] page on ADC: https://archive.org/details/6502UsersManual/page/n257
* [https://archive.org/details/mos_microcomputers_programming_manual/page/n204 B-3], lbid.
* [[Leventhal]] page on ADC: https://archive.org/details/6502-assembly-language-programming/page/n87
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n258 page 245] on ADC
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n87 page 3-38] on ADC
* undisbeliever on ADC: https://undisbeliever.net/snesdev/65816-opcodes.html#adc-add-with-carry
* undisbeliever on ADC: https://undisbeliever.net/snesdev/65816-opcodes.html#adc-add-with-carry
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#ADC
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.1


[[Category:ASM]]
[[Category:ASM]]
[[Category:Group One Instructions]]
[[Category:Group One Instructions]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]

Latest revision as of 17:09, 22 October 2024

Basic Info
Addressing Mode Opcode Length Speed
Immediate 69 2/3 bytes 2 cycles*
Absolute 6D 3 bytes 4 cycles*
Absolute Long 6F 4 bytes 5 cycles*
Direct Page 65 2 bytes 3 cycles*
Direct Page Indirect 72 2 bytes 5 cycles*
Direct Page Indirect Long 67 2 bytes 6 cycles*
Absolute Indexed by X 7D 3 bytes 4 cycles*
Absolute Long Indexed by X 7F 4 bytes 5 cycles*
Absolute Indexed by Y 79 3 bytes 4 cycles*
Direct Page Indexed by X 75 2 bytes 4 cycles*
Direct Page Indexed Indirect by X 61 2 bytes 6 cycles*
Direct Page Indirect Indexed by Y 71 2 bytes 5 cycles*
Direct Page Indirect Long Indexed by Y 77 2 bytes 6 cycles*
Stack Relative 63 2 bytes 4 cycles*
Stack Relative Indirect Indexed by Y 73 2 bytes 7 cycles*
Flags Affected
N V M X D I Z C
N V . . . . Z C

ADC (Add with Carry) is the main 65x addition instruction. The accumulator is always both one of the addends and where the sum is stored. The operand serves as the other addend.

As there is no add-without-carry instruction, a CLC should be run (or the carry flag otherwise ensured to be clear) before an ADC, or else the sum will be one greater than expected.

After ADC runs, the carry flag will indicate whether the addition caused an unsigned overflow (sum greater than $FF or $FFFF depending on how wide the accumulator is). The zero flag will be set if the sum is zero and cleared otherwise.

If the decimal flag is set, then binary coded decimal addition is performed (with the sum being adjusted automatically), otherwise binary addition.

Syntax

ADC #const
ADC addr
ADC long
ADC dp
ADC (dp)
ADC [dp]
ADC addr, X
ADC long, X
ADC addr, Y
ADC dp, X
ADC (dp, X)
ADC (dp), Y
ADC [dp], Y
ADC sr, S
ADC (sr, S), Y

Cycle Penalties

ADC takes an extra cycle for each of the following:

  • if the accumulator is 16 bits wide, in all addressing modes
  • when utilizing the direct register, if the low byte of the direct register is nonzero
  • in certain addressing modes if adding an index crosses a page boundary

If you only need to add one, consider INC instead. Unlike the 65c02, the 65c816 does not have a cycle penalty when adding in decimal mode.

See Also

External Links

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