INC

Basic Info
Addressing Mode	Opcode	Length	Speed
Accumulator	1A	1 byte	2 cycles
Absolute	EE	3 bytes	6 cycles*
Direct Page	E6	2 bytes	5 cycles*
Absolute Indexed by X	FE	3 bytes	7 cycles*
Direct Page Indexed by X	F6	2 bytes	6 cycles*

Flags Affected
N	V	M	X	D	I	Z	C
N	.	.	.	.	.	Z	.

INC (Increment) is a 65x instruction that increments the value in the location specified by one. The size of the accumulator determines whether this is an 8 or 16 bit operation. An alternate mnemonic when the operand is the accumulator is "INA."

INC ignores the decimal mode flag and the carry flag.

Syntax

INC
INC A
INA
INC addr
INC dp
INC addr, X
INC dp, X

To test for wraparound, examine the zero flag. If you need to add two or more to the accumulator, consider ADC instead of INC.

Cycle Penalties

• Except in accumulator addressing, INC takes two extra cycles when the accumulator is 16 bits wide.
• In direct page addressing modes, INC takes an extra cycle if the low byte of the direct page register is nonzero.

Although the NMOS 6502 does have INC, it does not work on the accumulator. When porting code to the 65c816, utilizing INC more often instead of ADC can make code smaller and faster.

See Also

• INX
• INY
• DEC
• INC (SPC700)
• INC (Super FX)

External Links

• Eyes & Lichty, page 456 on INC
• Labiak, page 142 on INC
• 10.7 on MCS6500 Manual, page 155 on INC
• Carr, page 260 on INC
• Leventhal, page 3-65 on INC
• snes9x implementation of INC: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L627
• undisbeliever on INC: https://undisbeliever.net/snesdev/65816-opcodes.html#inc-increment
• Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#INC
• Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.3