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GETB (Super FX): Difference between revisions

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!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
|'''Addressing Mode'''
|'''Opcode'''
|'''Opcode'''
|'''Length'''
|'''Length'''
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|'''Cache Speed'''
|'''Cache Speed'''
|+
|+
|[[Implied]] (type 1)
|EF
|EF
|1 byte
|1 byte
|3 to 8 cycles
|3 to 8 cycles
|3 to 9 cycles
|3 to 9 cycles
|1 to 6 cycle
|1 to 6 cycles
|}
|}


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!colspan="9"|Flags Affected
!colspan="9"|Flags Affected
|+
|+
|B
|[[B Flag|B]]
|ALT1
|[[ALT1]]
|ALT2
|[[ALT2]]
|O/V
|[[O/V]]
|S
|[[Sign Flag|S]]
|CY
|[[CY]]
|Z
|Z
|+
|+
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'''GETB''' (Get Byte) is a [[Super FX]] instruction that loads one byte from the ROM buffer.
'''GETB''' (Get Byte) is a [[Super FX]] instruction that loads one byte from the [[ROM buffer]] into the low byte of the [[destination register]]. The high byte of the destination register is zeroed.
 
R<sub>14</sub> serves as the ROM address pointer.
 
The reason the cycle times can vary is because of the [[ROM buffer]].
 
[[File:gsu_getb.png]]


=== See Also ===
=== See Also ===
* [[GETBH]]
* [[GETBH]]
* [[GETBL]]
* [[GETBS]]
* [[GETBS]]
* [[GETC]]
* [[ROMB]]


=== External Links ===
=== External Links ===
* Official Super Nintendo development manual on GETB: [https://archive.org/details/SNESDevManual/book2/page/n205 Page 2-9-49 of Book II]
* Official Super Nintendo development manual on GETB: 9.35 on [https://archive.org/details/SNESDevManual/book2/page/n205 Page 2-9-49 of Book II]
* example: [https://archive.org/details/SNESDevManual/book2/page/n206 page 2-9-50 of Book II], lbid


[[Category:ASM]]
[[Category:ASM]]
[[Category:Super FX]]
[[Category:Super FX]]
[[Category:Data Transfer Instructions]]
[[Category:Data Transfer Instructions]]
[[Category:One-byte Instructions]]

Latest revision as of 03:06, 4 July 2024

Basic Info
Addressing Mode Opcode Length ROM Speed RAM Speed Cache Speed
Implied (type 1) EF 1 byte 3 to 8 cycles 3 to 9 cycles 1 to 6 cycles
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 . . . .

GETB (Get Byte) is a Super FX instruction that loads one byte from the ROM buffer into the low byte of the destination register. The high byte of the destination register is zeroed.

R14 serves as the ROM address pointer.

The reason the cycle times can vary is because of the ROM buffer.

gsu getb.png

See Also

External Links