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PHY: Difference between revisions
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'''PHY''' is a [[65c816]] instruction that pushes the value of the [[Y index register]] onto the [[stack]]. | '''PHY''' is a [[65c816]] instruction that pushes the value of the [[Y index register]] onto the [[stack]]. If Y is 16 bits wide, the high byte is pushed first. | ||
===== Cycle Penalty | The [[stack pointer]] is decremented by the number of bytes Y is. | ||
No flags are affected. | |||
==== Syntax ==== | |||
<pre> | |||
PHY | |||
</pre> | |||
==== Cycle Penalty ==== | |||
* PHY takes one additional cycle if the index registers are 16 bits wide. | * PHY takes one additional cycle if the index registers are 16 bits wide. | ||
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* [[PHA]] | * [[PHA]] | ||
* [[PLY]] | * [[PLY]] | ||
* [[STY]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/482 page 482] on PHY | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n176 page 166] on PHY | ||
* snes9x implementation of PHY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921 | * snes9x implementation of PHY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921 | ||
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[[Category:65c02 additions]] | [[Category:65c02 additions]] | ||
[[Category:Push Instructions]] | [[Category:Push Instructions]] | ||
[[Category:One-byte Instructions]] | |||
Latest revision as of 00:05, 17 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Stack (Push) | 5A | 1 byte | 3 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| . | . | . | . | . | . | . | . | |
PHY is a 65c816 instruction that pushes the value of the Y index register onto the stack. If Y is 16 bits wide, the high byte is pushed first.
The stack pointer is decremented by the number of bytes Y is.
No flags are affected.
Syntax
PHY
Cycle Penalty
- PHY takes one additional cycle if the index registers are 16 bits wide.
See Also
External Links
- Eyes & Lichty, page 482 on PHY
- Labiak, page 166 on PHY
- snes9x implementation of PHY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921