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GETBS (Super FX): Difference between revisions
From SnesLab
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'''GETBS''' is a [[Super FX]] instruction that loads one byte from the [[ROM buffer]] into the low byte of the [[destination register]]. Every bit of the high byte | '''GETBS''' (Get Signed Byte) is a [[Super FX]] instruction that loads one byte from the [[ROM buffer]] into the low byte of the [[destination register]]. Every bit of the destination register's high byte becomes whatever bit 7 of that loaded byte is. | ||
The reason the cycle times can vary is because of the [[ROM buffer]]. | The reason the cycle times can vary is because of the [[ROM buffer]]. The [[ALT0]] state is restored. | ||
The destination register should be specified in advance using [[WITH]] or [[TO]]. Otherwise, R<sub>0</sub> serves as the default. The [[source register]] is ignored. | |||
==== Syntax ==== | ==== Syntax ==== | ||
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GETBS | GETBS | ||
</pre> | </pre> | ||
==== Example ==== | |||
Let: | |||
(ROM buffer) = 85h | |||
D<sub>reg</sub> : R<sub>8</sub> | |||
After executing GETBS: | |||
R<sub>8</sub> = ff85h | |||
[[File:gsu getbs.png]] | [[File:gsu getbs.png]] | ||
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* [[GETBL]] | * [[GETBL]] | ||
* [[GETBH]] | * [[GETBH]] | ||
* [[GETC]] | |||
* [[ALT3]] | * [[ALT3]] | ||
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[[Category:Data Transfer Instructions]] | [[Category:Data Transfer Instructions]] | ||
[[Category:Two-byte Instructions]] | [[Category:Two-byte Instructions]] | ||
[[Category:Expects Sreg/Dreg Prearranged]] |
Latest revision as of 09:19, 31 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Implied (type 1) | 3FEF | 2 bytes | 6 to 10 cycles | 6 to 9 cycles | 2 to 6 cycles |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . | . | . | . |
GETBS (Get Signed Byte) is a Super FX instruction that loads one byte from the ROM buffer into the low byte of the destination register. Every bit of the destination register's high byte becomes whatever bit 7 of that loaded byte is.
The reason the cycle times can vary is because of the ROM buffer. The ALT0 state is restored.
The destination register should be specified in advance using WITH or TO. Otherwise, R0 serves as the default. The source register is ignored.
Syntax
GETBS
Example
Let:
(ROM buffer) = 85h Dreg : R8
After executing GETBS:
R8 = ff85h
See Also
External Links
- Official Super Nintendo development manual on GETBS: 9.38 on page 2-9-55 of Book II
- example: page 2-9-56 of Book II, lbid