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BVS (SPC700): Difference between revisions

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No flags are affected.
No flags are affected.
==== Syntax ====
<pre>
BVS rel
</pre>
Where rel is a two's complement offset.


=== See Also ===
=== See Also ===

Latest revision as of 21:59, 4 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Program Counter Relative 70 2 byte when condition false: 2 cycles

when condition true: 4 cycles

Flags Affected
N V P B H I Z C
. . . . . . . .

BVS is an SPC700 instruction that performs a branch when the overflow flag is set.

No flags are affected.

Syntax

BVS rel

Where rel is a two's complement offset.

See Also

External Links