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BRL: Difference between revisions

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'''BRL''' is a [[65c816]] instruction that performs an unconditional jump.  The target can be anywhere within the current [[bank]].
'''BRL''' (Branch Long) is a [[65c816]] instruction that performs an unconditional jump.  The target can be anywhere within the current [[bank]].


The 16 bit operand is not an absolute address, but a signed displacement.
The 16 bit operand is not an absolute address, but a signed displacement from -32768 to 32767.


BRL is relocatable.  No flags are affected.
BRL is relocatable.  No flags are affected.
==== Syntax ====
<pre>
BRL label
</pre>
BRL works even in [[emulation mode]].


=== See Also ===
=== See Also ===
* [[BRA]]
* [[BRA]]
* [[JMP]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page 438, on BRL: https://archive.org/details/0893037893ProgrammingThe65816/page/n464
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/438 page 438] on BRL
* [[Labiak]] page 127 on BRL: https://archive.org/details/Programming_the_65816/page/n137
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n137 page 127] on BRL
* snes9x implementation of BRL: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1405
* snes9x implementation of BRL: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1405
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.2.1.2


[[Category:ASM]]
[[Category:ASM]]

Latest revision as of 11:57, 6 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Program Counter Relative Long 82 3 bytes 4 cycles
Flags Affected
N V M X D I Z C
. . . . . . . .

BRL (Branch Long) is a 65c816 instruction that performs an unconditional jump. The target can be anywhere within the current bank.

The 16 bit operand is not an absolute address, but a signed displacement from -32768 to 32767.

BRL is relocatable. No flags are affected.

Syntax

BRL label

BRL works even in emulation mode.

See Also

External Links