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Pipeline: Difference between revisions
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'''Pipelining''' is a feature of 65x processors to increase throughput. | |||
When finishing up an [[ADC]] instruction for example, these two things are happening simultaneously: | |||
* opcode fetch for the next instruction | |||
* the [[internal cycle]] of putting the sum into the accumulator. | |||
=== See Also === | === See Also === | ||
* [[Super_FX#Pipeline_Processing]] | * [[Super_FX#Pipeline_Processing]] | ||
=== Reference === | === Reference === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/40 page 40] | ||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:ASM]] | [[Category:ASM]] | ||
Latest revision as of 17:50, 22 October 2024
Pipelining is a feature of 65x processors to increase throughput.
When finishing up an ADC instruction for example, these two things are happening simultaneously:
- opcode fetch for the next instruction
- the internal cycle of putting the sum into the accumulator.