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PLY: Difference between revisions
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(→See Also: LDY) |
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==== Cycle Penalty ==== | |||
* PLY takes one additional cycle if the index registers are 16 bits wide. | * PLY takes one additional cycle if the index registers are 16 bits wide. | ||
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=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/488 page 488] on PLY | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n182 page 172] on PLY | ||
* snes9x implementation of PLY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921 | * snes9x implementation of PLY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921 | ||
Latest revision as of 06:31, 22 August 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Stack (Pull) | 7A | 1 byte | 4 cycles* |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
N | V | M | X | D | I | Z | C | |
N | . | . | . | . | . | Z | . |
PLY (PulL Y) is a 65x instruction that pulls the value at the top of the stack into the Y index register. PLY increments the stack pointer before the pull.
Syntax
PLY
Cycle Penalty
- PLY takes one additional cycle if the index registers are 16 bits wide.
See Also
External Links
- Eyes & Lichty, page 488 on PLY
- Labiak, page 172 on PLY
- snes9x implementation of PLY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921