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LSR (SPC700): Difference between revisions

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'''LSR''' (Logical Shift Right) is an [[SPC700]] instruction that shifts every bit of its operand one bit to the right, dividing it by two.  The least significant bit is shifted into the [[carry flag]].  A zero is shifted into the most significant bit.
'''LSR''' (Logical Shift Right) is an [[SPC700]] instruction that shifts all 8 bits of its operand one bit to the right, dividing it by two.  The least significant bit is shifted into the [[carry flag]].  A zero is shifted into the most significant bit.


The official manual has the bit shift operators for LSR pointing the wrong way.
The official manual has the bit shift operators for LSR pointing the wrong way.
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[[File:lsr_spc.png]]
[[File:lsr_spc.png]]
LSR is a fast alternative to [[DIV]] when dividing by a power of two.


=== See Also ===
=== See Also ===

Latest revision as of 00:04, 15 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 5C 1 byte 2 cycles
Direct Page 4B 2 bytes 4 cycles
Direct Page Indexed by X 5B 2 bytes 5 cycles
Absolute 4C 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
N . . . . . Z C

LSR (Logical Shift Right) is an SPC700 instruction that shifts all 8 bits of its operand one bit to the right, dividing it by two. The least significant bit is shifted into the carry flag. A zero is shifted into the most significant bit.

The official manual has the bit shift operators for LSR pointing the wrong way.

Syntax

LSR A
LSR dp
LSR dp+X
LSR !abs

lsr spc.png

LSR is a fast alternative to DIV when dividing by a power of two.

See Also

External Links