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LSR: Difference between revisions

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'''LSR''' (Logical Shift Right) is a 65x instruction that shifts every bit of a value one bit to the right (division by two).  The most significant bit and [[negative flag]] are cleared.  The least significant bit is shifted into the [[carry flag]].
'''LSR''' (Logical Shift Right) is a 65x instruction that shifts every bit of a value one bit to the right (division by two).  The most significant bit and [[negative flag]] are cleared.  The least significant bit is shifted into the [[carry flag]].  The previous value of the carry flag is lost (unlike with [[ROR]]).


The size of the accumulator determines how many bits are shifted (8 or 16).
The size of the accumulator determines how many bits are shifted (8 or 16) not including the clearing zero and carry flag.


==== Syntax ====
==== Syntax ====
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===== Cycle Penalties =====
==== Cycle Penalties ====
* Except in [[accumulator addressing]], LSR takes an extra two cycles when the accumulator is 16 bits wide
* Except in [[accumulator addressing]], LSR takes an extra two cycles when the accumulator is 16 bits wide
* In [[direct page addressing]] modes, LSR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
* In [[direct page addressing]] modes, LSR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
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* [[LSR (SPC700)]]
* [[LSR (SPC700)]]
* [[LSR (Super FX)]]
* [[LSR (Super FX)]]
* [[ROR]]
* [[DIV2]]
* [[DIV2]]


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* 10.1 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n169 page 148] on LSR
* 10.1 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n169 page 148] on LSR
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n278 page 265] on LSR
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n278 page 265] on LSR
* [[Leventhal]] page 3-76 on LSR: https://archive.org/details/6502-assembly-language-programming/page/n125
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n125 page 3-76] on LSR
* snes9x implementation of LSR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L862
* snes9x implementation of LSR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L862
* undisbeliever on LSR: https://undisbeliever.net/snesdev/65816-opcodes.html#lsr-logical-shift-right
* undisbeliever on LSR: https://undisbeliever.net/snesdev/65816-opcodes.html#lsr-logical-shift-right

Latest revision as of 17:45, 23 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 4A 1 byte 2 cycles
Absolute 4E 3 bytes 6 cycles*
Direct Page 46 2 bytes 5 cycles*
Absolute Indexed by X 5E 3 bytes 7 cycles*
Direct Page Indexed by X 56 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
0 . . . . . Z C

LSR (Logical Shift Right) is a 65x instruction that shifts every bit of a value one bit to the right (division by two). The most significant bit and negative flag are cleared. The least significant bit is shifted into the carry flag. The previous value of the carry flag is lost (unlike with ROR).

The size of the accumulator determines how many bits are shifted (8 or 16) not including the clearing zero and carry flag.

Syntax

LSR
LSR A
LSR addr
LSR dp
LSR addr, X
LSR dp, X

Cycle Penalties

816 lsr.png

See Also

External Links