BIT: Difference between revisions

Latest revision as of 17:48, 23 August 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Immediate	89	2/3 bytes	2 cycles*
Absolute	2C	3 bytes	4 cycles*
Direct Page	24	2 bytes	3 cycles*
Absolute Indexed by X	3C	3 bytes	4 cycles*
Direct Page Indexed by X	34	2 bytes	4 cycles*


Flags Affected
Addressing Mode	N	V	M	X	D	I	Z	C
Immediate	.	.	.	.	.	.	Z	.
other	N	V	.	.	.	.	Z	.

BIT is a 65x instruction that performs a logical AND operation between the accumulator and memory without storing the conjunction. If the conjunction is zero, the zero flag is set, otherwise it is cleared.

Except in immediate addressing, the most significant bit of the data located at the effective address is moved into the negative flag, and the second most significant bit of that data is moved into the overflow flag. BIT is often used right before a conditional branch instruction like BVC or BVS.

Syntax

BIT #const
BIT addr
BIT dp
BIT addr, X
BIT dp, X

Cycle Penalties

BIT takes an extra cycle when the accumulator is 16 bits wide, in all addressing modes
In direct page addressing modes, BIT takes an extra cycle when the low byte of the direct page register is nonzero
In Absolute Indexed, X Addressing, BIT takes an extra cycle when adding the index crosses a page boundary

External Links

Eyes & Lichty, page 431 on BIT
Labiak, page 121 on BIT
4.2.2.1 on MCS6500 Manual, page 47 on BIT
Carr, page 249 on BIT
Leventhal, page 3-45 on BIT
snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator
Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#BIT
Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.2.2

@@ Line 1: / Line 1: @@
-'''BIT''' is a 65x instruction that performs a logical AND operation between the [[accumulator]] and memory without storing the conjunction.
+{| class="wikitable" style="float:right;clear:right;width:40%"
-{| class="wikitable" style="float:right;clear:right;width:30%"
 !colspan="8"|Basic Info
 |+
@@ Line 9: / Line 7: @@
 |'''Speed'''
 |+
-|immediate
+|[[Immediate]]
 |89
-|2 bytes
+|2/3 bytes
-|2 cycles
+|2 cycles*
 |+
-|absolute
+|[[Absolute]]
 |2C
 |3 bytes
-|4 cycles
+|4 cycles*
 |+
-|direct page
+|[[Direct Page Addressing|Direct Page]]
 |24
 |2 bytes
-|3 cycles
+|3 cycles*
 |+
-|absolute indexed X
+|[[Absolute Indexed by X]]
 |3C
 |3 bytes
-|4 cycles
+|4 cycles*
 |+
-|direct page indexed X
+|[[Direct Page Indexed by X]]
 |34
 |2 bytes
-|4 cycles
+|4 cycles*
 |}
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="9"|Flags Clobbered
+!colspan="9"|Flags Affected
+|+
+|Addressing Mode
+|[[Negative Flag|N]]
+|[[Overflow Flag|V]]
+|[[M Flag|M]]
+|[[X Flag|X]]
+|[[Decimal Flag|D]]
+|[[I Flag|I]]
+|[[Zero Flag|Z]]
+|[[Carry Flag|C]]
+|+
+|[[Immediate]]
+|.
+|.
+|.
+|.
+|.
+|.
+|Z
+|.
 |+
+|other
 |N
 |V
-|M
-|X
-|D
-|I
-|Z
-|C
-|+
-|
-|
 |.
 |.
 |.
 |.
-|
+|Z
 |.
 |}
+'''BIT''' is a 65x instruction that performs a logical AND operation between the [[accumulator]] and memory without storing the conjunction.  If the conjunction is zero, the [[zero flag]] is set, otherwise it is cleared.
+Except in [[immediate addressing]], the most significant bit of the data located at the effective address is moved into the [[negative flag]], and the second most significant bit of that data is moved into the [[overflow flag]].  BIT is often used right before a conditional branch instruction like [[BVC]] or [[BVS]].
+==== Syntax ====
+<pre>
+BIT #const
+BIT addr
+BIT dp
+BIT addr, X
+BIT dp, X
+</pre>
+==== Cycle Penalties ====
+* BIT takes an extra cycle when the accumulator is 16 bits wide, in all [[addressing modes]]
+* In direct page addressing modes, BIT takes an extra cycle when the low byte of the [[direct page register]] is nonzero
+* In [[Absolute Indexed, X Addressing]], BIT takes an extra cycle when adding the index crosses a [[page]] boundary
+=== See Also ===
+* [[AND]]
+* [[BPL]]
+* [[BNE]]
+* [[BCC]]
+* [[BCS]]
+=== External Links ===
+* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/431 page 431] on BIT
+* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n131 page 121] on BIT
+* 4.2.2.1 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n62 page 47] on BIT
+* [[Carr]], [https://archive.org/details/6502UsersManual/page/n262 page 249] on BIT
+* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n94 page 3-45] on BIT
+* snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
+* undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator
+* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#BIT
+* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.2.2
 [[Category:ASM]]
+[[Category:Group Three Instructions]]
+[[Category:Inherited from 6502]]