We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

ROL: Difference between revisions

From SnesLab
Jump to: navigation, search
(added basic info)
(deindent cycle penalty)
 
(50 intermediate revisions by the same user not shown)
Line 1: Line 1:
'''ROL''' (Rotate Left) is a 65x instruction that rotates a value and the [[carry flag]] left one bit.  The most significant bit is shifted into the carry flag.  The carry flag is shifted into the least significant bit.
{| class="wikitable" style="float:right;clear:right;width:40%"
 
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
Line 9: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|accumulator
|[[Accumulator Addressing|Accumulator]]
|2A
|2A
|1 byte
|1 byte
|2 cycles
|2 cycles
|+
|+
|absolute
|[[Absolute]]
|2E
|2E
|3 bytes
|3 bytes
|6 cycles
|6 cycles*
|+
|+
|direct page
|[[Direct Page Addressing|Direct Page]]
|26
|26
|2 bytes
|2 bytes
|5 cycles
|5 cycles*
|+
|+
|absolute indexed by X
|[[Absolute Indexed by X]]
|3E
|3E
|3 bytes
|3 bytes
|7 cycles
|7 cycles*
|+
|+
|direct page indexed by X
|[[Direct Page Indexed by X]]
|36
|36
|2 bytes
|2 bytes
|6 cycles
|6 cycles*
|}
|}


{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="9"|Flags Clobbered
!colspan="9"|Flags Affected
|+
|[[N Flag|N]]
|[[V Flag|V]]
|[[M Flag|M]]
|[[X Flag|X]]
|[[D Flag|D]]
|[[I Flag|I]]
|[[Z Flag|Z]]
|[[C Flag|C]]
|+
|+
|N
|N
|V
|M
|X
|D
|I
|Z
|C
|+
|
|.
|.
|.
|.
Line 53: Line 51:
|.
|.
|.
|.
|
|Z
|
|C
|}
|}
'''ROL''' (Rotate Left) is a 65x instruction that rotates a value and the [[carry flag]] left one bit.  The most significant bit is shifted into the carry flag.  The carry flag is shifted into the least significant bit. 
* When the [[accumulator]] is 8 bits wide, 9 bits are rotated.
* When the accumulator is 16 bits wide, 17 bits are rotated.
==== Syntax ====
<pre>
ROL
ROL A
ROL addr
ROL dp
ROL addr, X
ROL dp, X
</pre>
==== Cycle Penalties ====
* Except in [[accumulator addressing]], ROL takes two extra cycles when the accumulator is 16 bits wide.
* In [[direct page addressing]] modes, ROL takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
[[File:816_rol.png]]
The arrow in the Carr textbook diagram does not circle back around.


=== See Also ===
=== See Also ===
* [[ROR]]
* [[ROR]]
* [[ASL]]
* [[ROL (SPC700)]]
* [[ROL (Super FX)]]
=== External Links ===
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/490 page 490] on ROL
* lbid [https://archive.org/details/0893037893ProgrammingThe65816/page/190 page 190] before & after diagram of ROL
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n184 page 174] on ROL
* 10.3 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n170 page 149] on ROL
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n282 page 269] on ROL
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n134 page 3-85] on ROL
* snes9x implementation of ROL: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1011
* undisbeliever on ROL: https://undisbeliever.net/snesdev/65816-opcodes.html#rol-rotate-left
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#ROL
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.3


[[Category:ASM]]
[[Category:ASM]]
[[Category:Group Two Instructions]]
[[Category:Read-Modify-Write Instructions]]
[[Category:Inherited from 6502]]

Latest revision as of 17:44, 23 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 2A 1 byte 2 cycles
Absolute 2E 3 bytes 6 cycles*
Direct Page 26 2 bytes 5 cycles*
Absolute Indexed by X 3E 3 bytes 7 cycles*
Direct Page Indexed by X 36 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
N . . . . . Z C

ROL (Rotate Left) is a 65x instruction that rotates a value and the carry flag left one bit. The most significant bit is shifted into the carry flag. The carry flag is shifted into the least significant bit.

  • When the accumulator is 8 bits wide, 9 bits are rotated.
  • When the accumulator is 16 bits wide, 17 bits are rotated.

Syntax

ROL
ROL A
ROL addr
ROL dp
ROL addr, X
ROL dp, X

Cycle Penalties

816 rol.png

The arrow in the Carr textbook diagram does not circle back around.

See Also

External Links