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Ready pin: Difference between revisions
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[[File:Ready pin schematic.png|thumb|the Ready pin, in region B1 of the [[jwdonal schematic]]]] | |||
The '''Ready pin''' is the 81th on the [[S-CPU]], according to the jwdonald schematic. It is connected directly to [[VCC]], as well as /ABORT and /[[NMI]]. | The '''Ready pin''' is the 81th on the [[S-CPU]], according to the jwdonald schematic. It is connected directly to [[VCC]], as well as /ABORT and /[[NMI]]. | ||
[[ | === See Also === | ||
* [[WAI]] | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
Latest revision as of 10:01, 27 November 2023
the Ready pin, in region B1 of the jwdonal schematic
The Ready pin is the 81th on the S-CPU, according to the jwdonald schematic. It is connected directly to VCC, as well as /ABORT and /NMI.