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fullsnes: Difference between revisions

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=== Errata ===
=== Errata ===
* With regards to the [[break flag]], this sentence is dubious: "PHP opcodes always write "1" into the bit"
* The [[Color Math]] register at 2130h is missing an "S" - the full name is CGSWSEL not CGWSEL.
* In https://problemkaputt.de/fullsnes.htm#snesapumaincpucommunicationport, fullsnes only mentions storing the entrypoint to 2142h and does not mention whether the entrypoint is a word or byte (the other places in this section where the bracket notation omits "Byte" or "Word" it is a single byte being stored).  The Official Super Nintendo development manual is clear that the program start address for the uploaded SPC700 driver is stored to both PORT 2 and 3 (as part of step 11 on page D-2).
* In https://problemkaputt.de/fullsnes.htm#snesapumaincpucommunicationport, fullsnes only mentions storing the entrypoint to 2142h and does not mention whether the entrypoint is a word or byte (the other places in this section where the bracket notation omits "Byte" or "Word" it is a single byte being stored).  The Official Super Nintendo development manual is clear that the program start address for the uploaded SPC700 driver is stored to both PORT 2 and 3 (as part of step 11 on page D-2).
* In https://problemkaputt.de/fullsnes.htm#snescartridgecicnotes, the formula for the [[Polynomial Counter]] is missing an inversion in the second term.
* In https://problemkaputt.de/fullsnes.htm#snescartridgecicnotes, the formula for the [[Polynomial Counter]] is missing an inversion in the second term.
* In https://problemkaputt.de/fullsnes.htm#snespputimersandstatus, the [[Interlace Odd/Even Flag]] should use the term "field" instead of "frame" as an interlaced field is half of a frame
* In https://problemkaputt.de/fullsnes.htm#snespputimersandstatus, the [[Interlace Odd/Even Flag]] should use the term "field" instead of "frame" as an interlaced field is half of a frame
* In https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports, it could be clearer that bits 0-3 of TnOUT are reset to 0 automatically by hardware after reading - it is not the programmer's responsibility to zero them after reading. [1]
* In https://problemkaputt.de/fullsnes.htm#snesapuspc700ioports, it could be clearer that bits 0-3 of TnOUT are reset to 0 automatically by hardware after reading - it is not the programmer's responsibility to zero them after reading. <sup>[1]</sup>
* In https://problemkaputt.de/fullsnes.htm#snesapudspvolumeregisters, MVOL should stand for "main volume," not "master volume" because MVOL does not control the echo volume, and "Main Volume" is how the official docs expand "MVOL." [2]
* In https://problemkaputt.de/fullsnes.htm#snesapudspvolumeregisters, MVOL should stand for "main volume," not "master volume" because MVOL does not control the echo volume, and "Main Volume" is how the official docs expand "MVOL." <sup>[2]</sup>
* In https://problemkaputt.de/fullsnes.htm#snesapublockdiagram, the word "Reverb" is used (the only place this word is used in fullsnes) but should probably say "Echo" instead like the rest of the times this feature is mentioned, as they have slightly different musical meanings.
* In https://problemkaputt.de/fullsnes.htm#snesapublockdiagram, the word "Reverb" is used (the only place this word is used in fullsnes) but should probably say "Echo" instead like the rest of the times this feature is mentioned, as they have slightly different musical meanings.
* In https://problemkaputt.de/fullsnes.htm#snesapudspechoregisters, "bit" should be plural in several places when describing the ESA buffer entry bytes
* In https://problemkaputt.de/fullsnes.htm#snesapudspechoregisters, "bit" should be plural in several places when describing the ESA buffer entry bytes

Latest revision as of 00:22, 22 July 2024

Fullsnes is a large hardware reference for the SNES created by nocash with several ascii art illustrations.

Errata

External Links

References

  1. Page 3-5-2 of Book I of the official Super Nintendo development manual: "When CN is read, the 4-bit up counter alone is cleared through IC internal timing"
  2. page 3-7-9 of Book I lbid