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ROR: Difference between revisions

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'''ROR''' (Rotate Right) is a 65x instruction that rotates a value and the [[carry flag]] right one bit.  The least significant bit is shifted into the carry flag.  The carry flag is shifted into the most significant bit.  Except in [[accumulator addressing]], ROR takes two extra cycles when the accumulator is 16 bits wide. In [[direct page addressing]] modes, ROR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
'''ROR''' (Rotate Right) is a 65x instruction that rotates a value and the [[carry flag]] right one bit.  The least significant bit is shifted into the carry flag.  The carry flag is shifted into the most significant bit.   
 
===== Cycle Penalties =====
* Except in [[accumulator addressing]], ROR takes two extra cycles when the accumulator is 16 bits wide.
* In [[direct page addressing]] modes, ROR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.


=== See Also ===
=== See Also ===

Revision as of 21:34, 20 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 6A 1 byte 2 cycles
Absolute 6E 3 bytes 6 cycles*
Direct Page 66 2 bytes 5 cycles*
absolute indexed by X 7E 3 bytes 7 cycles*
direct page indexed by X 76 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
. . . . .

ROR (Rotate Right) is a 65x instruction that rotates a value and the carry flag right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit.

Cycle Penalties

See Also

External Links

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