We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
AND1 (SPC700): Difference between revisions
From SnesLab
(linkify flags) |
(3 byte Instructions) |
||
| Line 54: | Line 54: | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:Bit Operation Commands]] | [[Category:Bit Operation Commands]] | ||
[[Category:Three-byte Instructions]] | |||
Revision as of 11:32, 28 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 13-bit Absolute | 4A | 3 bytes | 4 cycles | ||||
| 13-bit Absolute | 6A | 3 bytes | 4 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |
AND1 is an SPC700 instruction that performs a logical AND between a memory bit and the carry flag, then stores the conjunction in the carry flag. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.
See Also
External Links
- Official Nintendo documentation on AND1: Table C-18 in Appendix C-9 of Book I