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Processor Status Register: Difference between revisions
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=== Reference === | === Reference === | ||
* Table 18.2 [[Eyes & Lichty]], page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/n448 | * Table 18.2 [[Eyes & Lichty]], page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/n448 | ||
* Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/n403 | * Figure 17.3, Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/n403 | ||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:Flags]] | [[Category:Flags]] | ||
Revision as of 17:18, 14 December 2023
The Processor Status Register (P) is on the 65c816 and contains several flags:
- n
- v
- m
- x
- d
- i
- z
- c
It can be pulled from the stack via PLP and RTI.
See Also
Reference
- Table 18.2 Eyes & Lichty, page 422: https://archive.org/details/0893037893ProgrammingThe65816/page/n448
- Figure 17.3, Lbid, page 377: https://archive.org/details/0893037893ProgrammingThe65816/page/n403