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GETBS (Super FX): Difference between revisions

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The reason the cycle times can vary is because of the ROM buffer.
The reason the cycle times can vary is because of the ROM buffer.
[[File:gsu getbs.png]]


=== See Also ===
=== See Also ===

Revision as of 00:35, 1 July 2024

Basic Info
Opcode Length ROM Speed RAM Speed Cache Speed
3FEF 2 bytes 6 to 10 cycles 6 to 9 cycles 2 to 6 cycle
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 . . . .

GETBS is a Super FX instruction that loads one byte from the ROM buffer into the low byte of the destination register. Every bit of the high byte of the destination register becomes whatever bit 7 of that loaded byte is.

The reason the cycle times can vary is because of the ROM buffer.

gsu getbs.png

See Also

External Links