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ROR: Difference between revisions

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* In [[direct page addressing]] modes, ROR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
* In [[direct page addressing]] modes, ROR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.


[[File:ror.png]]
[[File:816_ror.png]]


=== See Also ===
=== See Also ===

Revision as of 03:53, 17 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 6A 1 byte 2 cycles
Absolute 6E 3 bytes 6 cycles*
Direct Page 66 2 bytes 5 cycles*
Absolute Indexed by X 7E 3 bytes 7 cycles*
Direct Page Indexed by X 76 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
. . . . .

ROR (Rotate Right) is a 65x instruction that rotates a value and the carry flag right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit.

When the accumulator is 8 bits wide, 9 bits are rotated. When the accumulator is 16 bits wide, 17 bits are rotated.

Syntax

ROR
ROR A
ROR addr
ROR dp
ROR addr, X
ROR dp, X
Cycle Penalties

816 ror.png

See Also

External Links