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Bank Address Register: Difference between revisions
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''Note: this page is likely inaccurate/confusing;'' | ''Note: this page is likely inaccurate/confusing;'' | ||
The '''Bank Address Register''' (also known as the '''bank byte''') is Nintendo's name for the 8-bit register that fills in the most significant bits of a 24-bit address memory access by the [[5A22]]. It keeps track of what bank the CPU is configured to use. It is cleared to zero on reset. | The '''Bank Address Register''' (also known as the '''bank byte''') is Nintendo's name for the 8-bit register that fills in the most significant bits of a 24-bit address memory access by the [[5A22]]. It keeps track of what bank the CPU is configured to use. It is cleared to zero on reset.<sup>[2]</sup> | ||
WDC calls this register the '''Data Bank Register''' (DBR). | |||
[[PLB]], [[MVN]], and [[MVP]] modify this register. | [[PLB]], [[MVN]], and [[MVP]] modify this register. | ||
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=== References === | === References === | ||
# Figure 2-21-2 on [https://archive.org/details/SNESDevManual/book1/page/n94 page 2-21-3 of Book I] of the official Super Nintendo development manual | |||
# section 2.5 on page 6 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | |||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:ASM]] | [[Category:ASM]] | ||
Revision as of 18:06, 31 July 2024
Note: this page is likely inaccurate/confusing;
The Bank Address Register (also known as the bank byte) is Nintendo's name for the 8-bit register that fills in the most significant bits of a 24-bit address memory access by the 5A22. It keeps track of what bank the CPU is configured to use. It is cleared to zero on reset.[2]
WDC calls this register the Data Bank Register (DBR).
PLB, MVN, and MVP modify this register.
See Also
References
- Figure 2-21-2 on page 2-21-3 of Book I of the official Super Nintendo development manual
- section 2.5 on page 6 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf