We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

Index Register Select: Difference between revisions

From SnesLab
Jump to: navigation, search
(no BXS/BXC)
(→‎References: hid archive URL for E&L)
Line 20: Line 20:
* [[Memory/Accumulator Select]]
* [[Memory/Accumulator Select]]


=== References ===
=== Reference ===
* [[Eyes & Lichty]], page 422, Table 18.2. 65x Flags. https://archive.org/details/0893037893ProgrammingThe65816/page/422
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/422 page 422], Table 18.2. 65x Flags.


[[Category:ASM]]
[[Category:ASM]]
[[Category:Flags]]
[[Category:Flags]]
[[Category:65c816 additions]]
[[Category:65c816 additions]]

Revision as of 01:10, 7 August 2024

Index Register Select (X) is a flag in the processor status register (bit 4) of the 65c816. It indicates how wide the index registers are:

  • When clear, both index registers are 16 bits wide.
  • When set, both index registers are 8 bits wide.

It is not possible to control the width of the two index registers individually.

It can be affected by:

In emulation mode, the x flag becomes the break flag.

There are no BXS or BXC instructions that examine this flag.

See Also

Reference