We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
PLY: Difference between revisions
From SnesLab
(→External Links: hide archive URL for E&L) |
(deindented headers) |
||
| Line 42: | Line 42: | ||
</pre> | </pre> | ||
==== Cycle Penalty ==== | |||
* PLY takes one additional cycle if the index registers are 16 bits wide. | * PLY takes one additional cycle if the index registers are 16 bits wide. | ||
Latest revision as of 06:31, 22 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Stack (Pull) | 7A | 1 byte | 4 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| N | . | . | . | . | . | Z | . | |
PLY (PulL Y) is a 65x instruction that pulls the value at the top of the stack into the Y index register. PLY increments the stack pointer before the pull.
Syntax
PLY
Cycle Penalty
- PLY takes one additional cycle if the index registers are 16 bits wide.
See Also
External Links
- Eyes & Lichty, page 488 on PLY
- Labiak, page 172 on PLY
- snes9x implementation of PLY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921