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CLD: Difference between revisions
From SnesLab
(→See Also: BRK) |
(flowed REP into body) |
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CLD | CLD | ||
</pre> | </pre> | ||
To clear more than one flag at the same time, use [[REP]]. | |||
=== See Also === | === See Also === | ||
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* [[CLC]] | * [[CLC]] | ||
* [[CLV]] | * [[CLV]] | ||
* [[BRK]] | * [[BRK]] | ||
Revision as of 01:55, 10 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 2) | D8 | 1 byte | 2 cycles | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| . | . | . | . | 0 | . | . | . | |
CLD is a 65x instruction that clears the decimal mode flag, switching the processor back into binary mode so ADC and SBC will operate normally.
No other flags are affected.
Syntax
CLD
To clear more than one flag at the same time, use REP.
See Also
External Links
- Eyes & Lichty, page 442 on CLD
- Labiak, page 131 on CLD
- 3.3.2 on MCS6500 Manual, page 27 on CLD
- Carr, page 254 on CLD
- Leventhal, page 3-53 on CLD
- snes9x implementation of CLD: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1434
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.4.1