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ASL: Difference between revisions

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===== Cycle Penalties =====
==== Cycle Penalties ====
* Except in [[accumulator addressing]], ASL takes two extra cycles when the accumulator is 16 bits wide
* Except in [[accumulator addressing]], ASL takes two extra cycles when the accumulator is 16 bits wide
* In [[direct page addressing]] modes, ASL takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
* In [[direct page addressing]] modes, ASL takes another extra cycle if the low byte of the [[direct page register]] is nonzero.

Latest revision as of 17:45, 23 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 0A 1 byte 2 cycles
Absolute 0E 3 bytes 6 cycles*
Direct Page 06 2 bytes 5 cycles*
Absolute Indexed by X 1E 3 bytes 7 cycles*
Direct Page Indexed by X 16 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
N . . . . . Z C

ASL (Arithmetic Shift Left) is a 65x instruction that shifts every bit of a value left one bit (multiplication by two). The least significant bit is cleared. The most significant bit is shifted into the carry flag. The previous value of the carry flag is lost (unlike with ROL).

The size of the accumulator determines how many bits are shifted (8 or 16) not including the clearing zero and carry flag.

Syntax

ASL
ASL A
ASL addr
ASL dp
ASL addr, X
ASL dp, X

Cycle Penalties

816 asl.png

See Also

External Links