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Carry Flag: Difference between revisions

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The '''Carry Flag''' (C) exists on the [[65c816]] as bit 0 of the [[status register]].
The '''Carry Flag''' (C) is bit 0 of the [[65c816]]'s [[status register]].


It can be set with [[SEC]] and cleared with [[CLC]].  Or, [[SEP]] and [[REP]] can be used.
It can be set with [[SEC]] and cleared with [[CLC]].  Or, [[SEP]] and [[REP]] can be used.

Revision as of 04:20, 12 August 2024

The Carry Flag (C) is bit 0 of the 65c816's status register.

It can be set with SEC and cleared with CLC. Or, SEP and REP can be used.

The following other 10 instructions have side effects that directly affect the carry flag, which includes all arithmetic and all shift/rotate instructions:

  • ADC (becomes set when an addition overflows)
  • ASL (becomes whatever the most significant bit was)
  • CMP
  • CPX
  • CPY
  • LSR (becomes whatever bit 0 was)
  • ROL (becomes whatever the most significant bit was)
  • ROR (becomes whatever bit 0 was)
  • SBC (where it is often called the "borrow flag" instead)
  • XCE (becomes whatever the e flag was)

The following two instructions indirectly affect the carry flag by loading the status register:

The carry flag influences whether BCS and BCC branch or not.

See Also

Reference