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Write-Twice Register: Difference between revisions
From SnesLab
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* On the second write, both the new 8-bit value on the data bus and the buffered 8-bit value both overwrite the old contents of the 16-bit register simultaneously. | * On the second write, both the new 8-bit value on the data bus and the buffered 8-bit value both overwrite the old contents of the 16-bit register simultaneously. | ||
=== | [[Fullsnes]] says a flipflop keeps track of whether we are on the 1st or 2nd access for CGRAM writes.<sup>[2]</sup> | ||
=== References === | |||
# https://retrocomputing.stackexchange.com/a/7071 | |||
# https://problemkaputt.de/fullsnes.htm#snesmemorycgramaccesspalettememory | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:Buffers]] | [[Category:Buffers]] |
Latest revision as of 16:57, 14 August 2024
Write-twice registers need to be written to twice before their value is updated. They are 16-bit registers that are mapped to only 8-bits in an address space. The motivation behind write-twice registers is that they prevent glitches caused by software accidentally only updating half of a 16-bit register. This is accomplished via an additional, hidden 8-bit buffer:
- On the first write, the 8-bit value on the CPU Data Bus is written to the hidden buffer, but the contents of the 16-bit register are not updated yet.
- On the second write, both the new 8-bit value on the data bus and the buffered 8-bit value both overwrite the old contents of the 16-bit register simultaneously.
Fullsnes says a flipflop keeps track of whether we are on the 1st or 2nd access for CGRAM writes.[2]