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Pixel Clock: Difference between revisions
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=== References === | === References === | ||
* https://problemkaputt.de/fullsnes.htm#snestimingoscillators | * https://problemkaputt.de/fullsnes.htm#snestimingoscillators | ||
[[Category:SNES Hardware]] | |||
Revision as of 02:55, 12 May 2023
The Pixel Clock signal is generated by the PPU by dividing the Master Clock frequency by 4. On NTSC, the pixel clock is 5.37 MHz. On PAL, 5.32 MHz.